Advanced Battery Technology
EMC Notebook

Decoupling

by William D. Kimmel, P.E.
and Daryl D. Gerke, P.E.


Kimmel Gerke Associates, Ltd.

Decoupling problems are the source of numerous EMI problems. The biggest problem with decoupling is due to lead inductance in the decoupling capacitors. Interestingly, decoupling plays a significant role in signal paths as well.

While the chip houses specify decoupling for Vcc droop, their recommendations are woefully inadequate for emissions control, which may demand two to three decades better decoupling than is required to satisfy the chip.

Interlayer capacitance plays a dominant decoupling role above 1GHz, and a decreasing role down to about 200MHz, where the interloper capacitance becomes ineffective and decoupling capacitors take over. This is a critical frequency range for decoupling, as poorly mounted capacitors fail to do their job.

Let’s take a look at the decoupling problem, and some of the things that can help.

ESL

Effective series inductance (ESL) is the culprit in many of the decoupling problems we encounter.

The problem lies in the inevitable loop area associated with the mounting of the capacitor. A typical 0603 SMT capacitor will have 2nH of inductance – partially due to the path in the vias, and partially due to the fact that the capacitor sits above the nearest plane. 2nH of inductance will produce an impedance of Z = 2pi*f*L = 12 ohms at 1GHz – hardly the high frequency short we were hoping for. In practice, the upper frequency performance in decoupling is driven almost entirely by the lead inductance – at 1GHz, it makes little difference if your capacitor value is 100pF or 10,000pF, as long as the package size is the same.

Accordingly, we should look for the possible ways of reducing the inductance in the path. There are three factors that are significant in keeping the high frequency impedance down – component type, mounting technique leads if any need to be kept short and mounting location so that clads paths are as short as possible. All of these need to be done correctly or your decoupling will not be effective.

Selecting Low ESR Capacitors

The first rule is to select the right capacitor type. We can do a better job of decoupling if we start with the right capacitor, one with a low series resistance and inductance. Electrolytic capacitors play no role in high frequency decoupling – use them only for bulk storage.

The good news is that ceramic capacitors are about as good as you can find. The material type is not important for decoupling effectiveness – inductance is primarily driven by the package size (and the mounting, discussed below). Some loss factor is beneficial – it softens resonances.

Use the smallest capacitor package possible, consistent with voltage requirements and capacity. A 1206 capacitor will nearly double the series inductance over a 0603. Use reverse aspect components, such as a 0306 instead of 0603. This can reduce your inductance to nearly half.

Low inductance capacitors are available, such as feedthrough capacitors. Where higher capacitance is needed, multipin capacitors, with alternating voltage and ground pins can be used.

By the way, using multiple capacitor values tends to create multiple resonances on-board. The common practice of using a small/medium/large capacitor should be confined to paralleling high frequency capacitors with electrolytics. If you must use multiple values, keep the value closely spaced (say, a factor of three) to reduce the stray resonance problem.

Mounting Technique

Next, we need to mount the capacitor for minimum inductance. How can this be done? Start with simple geometry – the ultimate goal is to reduce the effective loop area of each capacitor. Increasing mutual inductance between via pairs also helps. Here are some options:

1. Eliminate the trace between the via and the solder pad. Place the via in the solder pad if you can, otherwise immediately adjacent.

2. Use bigger vias or multiple vias. This reduces the effective inductance – in the case of multiple vias, we are effectively putting two inductors in parallel. A via for a 0603 capacitor typically has 0.5nH of inductance, or 1nH per capacitor mount.

3. Locate the via inside the solder pad. This increases the mutual inductance between the two pads. This is more feasible with the larger size capacitors.

4. Feedthrough capacitors reduce inductance largely by using additional solder pads, but there are also other benefits.

5. Use more capacitors. Simply put, if you double the number of capacitors, you will halve the effective inductance.

Mounting Location

You can improve the effectiveness of the capacitors by mounting them in the proper location. For two layer boards and multilayer boards with widely spaced planes (>0.25 mm) the following rules apply:

1. Mount the capacitor for minimum loop area, placing it near the voltage supply pin or ground pin, whichever results in the smallest loop area. For two-layer boards, use wide traces to connect to the capacitor.

2. Use decaps at all critical locations, including Vcc/Gnd, adjacent critical input and output pins (clocks, buses), at headers and connectors and near bulk capacitors. The main purpose is to provide not only a low impedance AC connection between power and ground, but also to provide a low impedance return path for the critical signals, including clock and high speed data buses.

Where the planes are tightly spaced, positioning becomes less important, and difficult to predict. The easiest and often the best choice is to place the caps on a more or less uniform grid, spaced 1/20 wavelength. Tap power/ground from the planes, not from the capacitors.

Decoupling for Signal Integrity

We tend to think of decoupling as being just for Vcc droop, but it plays significant role in maintaining a constant impedance path and for containing emissions. The key is the return path for the critical signal lines, especially the clock lines and, to a lesser extent, address and data bus.

The goal is to contain the high frequency harmonics, namely by keeping the signal/return path loop areas to a minimum. We need to pay as much attention to the signal return path as with the signal path itself. If the return path is interrupted, there will be an impedance discontinuity, adversely affecting signal integrity of high speed signal lines and energizing the slot and increasing emissions.

One of the key issues in controlling impedances is to ensure the path is constant along its entirety. You tend to think of impedance control as being an issue with terminations – the path continuity is assumed. This is a natural enough assumption when driving a cable, with the source at one end and the load at the other end. But with circuit boards, the path is usually not a straight shot from source to load – the signal may turn a corner or pass through a via. While the corner is not usually a problem, the via may cause a considerable problem. If the signal simply passes from one side of the reference plane through the via to the other side of the plane, the discontinuity is minimal. If the signal trace switches to another reference plane, the return path is disrupted, and the return currents will need to divert to the closest path back to the original plane, either through a ground via or a decoupling capacitor. In either case, the discontinuity can be minimized by placing an adjacent via from ground to ground, or by placing a decoupling capacitor adjacent to the signal via. True, this is not a real good return path, but it is better than nothing.

You also have discontinuities at the source and load chips. Depending on the preferred return path (either ground or power plane), the return current will need to go from signal to ground or power pin at both ends. So a decoupling capacitor at the critical input and output signal pins is important. A similar situation exists at headers and connectors.

Summary

The key issue in effective decoupling is inductance. All capacitors will resonate – it is your job to push the resonant frequency as high as possible by selecting capacitors with low inductance and mounting them for low inductance. Positioning plays a significant role as well, especially for the two-layer circuit boards.

And don’t forget about the impact on signal integrity. Decoupling capacitors play an important role in return path continuity.

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